JEE MAIN - Physics (2023 - 11th April Morning Shift - No. 7)
The logic performed by the circuit shown in figure is equivalent to :
_11th_April_Morning_Shift_en_7_1.png)
NAND
AND
OR
NOR
Explanation
_11th_April_Morning_Shift_en_7_2.png)
$$ Y=\overline{\bar{a}+\overline{\mathrm{b}}}=a \cdot b $$
The truth table for the given circuit will be
$$ \begin{array}{|c|c|c|} \hline \mathrm{a} & \mathrm{b} & \text { output } \\ \hline 0 & 0 & 0 \\ \hline 0 & 1 & 0 \\ \hline 1 & 0 & 0 \\ \hline 1 & 1 & 1 \\ \hline \end{array} $$
Hence it will be equivalent to AND gate.
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